1. Field of the Invention
The present invention relates to the area of parallel processing systems, and more particularly, to a method and apparatus providing for virtual connections with protection and flow control within a parallel processing system.
2. Art Background
In recent years, there has been an increased interest in parallel processing systems. This increased interest is largely attributable to the fact that parallel processing systems are capable of processing data much more rapidly than traditional sequential processing systems. A high-speed parallel processing system typically consists of a plurality of processor nodes, with each of these processor nodes incorporating a processor and associated memory. The plurality of processor nodes are then linked together by a communications network which allows the processor nodes to pass messages between themselves.
A parallel processing system advantageously processes a large data processing task by breaking it up into many smaller tasks such that these smaller task can be processed by multiple data processing nodes operating in parallel. At certain junctures in this processing, messages are typically passed between the processor nodes. The speed at which the larger task can be completed is essentially limited by the speed at which the individual processor nodes process data and the speed at which the system passes messages between the processor nodes. Accordingly, message passing should ideally be as fast as possible. In addition to speed, though, message passing must provide for flexibility, and protection.
Prior art systems typically implemented message passing in software. Software implementations, however, suffer from the fact that they necessarily access an operating system whenever a message is to be passed from a first node to a second node. The need to regularly involve the operating system whenever a message is passed contributes significantly to latency. Moreover, as operating systems become more and more complex to provide for greater flexibility, it becomes increasingly difficult to utilize a software implementation to provide for high performance message passing.
Accordingly, a hardware implementation wherein the operating system is not regularly involved in the message passing would be desirable. In such a system, the message passing hardware is directly visible to user processes, thereby eliminating the overhead of the operating system. Any such hardware implementation, however, must include means for protecting the boundaries between a user application, the operating system, and other user applications. In particular, the implementation must insure that a first user process operating at a first node not be allowed to arbitrarily send a message to a second user process operating at a second node. In addition, it is important that such a hardware implementation have flow control to prevent any user process from jamming the message passing hardware.
As will be described, in accordance with the present invention, message passing in a multi-computer system is implemented in hardware directly accessible to the user processes. Moreover, as will be described, the present invention implements this message passing with protection and flow control.